Accelerated network technologies

Akcelerované síťové technologie - schéma

Research in the field of methods for accelerating key tasks related to computer network monitoring and security. For acceleration, field-programmable gate arrays (FPGA) are used, which allow processing packets within networks with a penetrability 100 Gb/s.


Automatic verification

Printed Circuit Board

Research of methods used for automated analysing and verifying computer systems, including both formal analysis and verification, and intelligent testing and dynamic analysis. The objective is to increase the versatility, reliability and scalability of the present approaches taken with regard to automatic analysis and verification procedures. Infinite status systems are accentuated (i.e. systems with dynamic data or control structures, properties, etc.), as well as parallel programs and the verification of systems developed with the use of the latest HW/SW design methods.


Evolution design

Evoluční návrh - mutace obvodu

Research of the methods used for the evolution design of digital circuits. The objective is to automatically transform an abstract specification to develop digital circuits that will comply with pre-defined limits. It is anticipated that the evolution design will result in an innovative solution. Further utilisation of the evolution design is anticipated in the field of autonomous hardware reconfiguration.


HW/SW Co-design

HWSW codesign - shutterstock_12654325

Research and implementation of algorithms for modern design systems that are used for developing processors.
These design systems are based on the concept of a hardware/software co-design, enabling automated development of support tools such as translators, simulators, etc.


Modelling, simulation and optimization

microchip integrated on motherboard

Use of executable models in the design, implementation and maintenance of computer systems.
These models will enable the simulation, optimisation and code generation for target implementation. Furthermore, it will be easier to adapt these systems to changing conditions throughout their life.


Networks, protocols and embedded systems

Sítě, protokoly a vestavěné systémy

Research methods and algorithms used for modelling, designing and analysing computer networks and network components, both the versatile i.e. at the Internet level, and the specific, mainly cybernetic-physical system networks. Utmost attention is paid to the design and verification of the properties of such networks, as well as to creating tools to support or automate the design and its testing.


Biometric systems’ security

scanning fingerprint

In the field of biometric system security, we focus on detecting vivacity (verification whether a user who has presented their system biometrics is alive - and whether false biometrics may have been used); we are interested in the influence of skin diseases on fingerprint recognition (whether it is possible to tell a disease from a contaminated finger, or whether the quality of the fingerprint affected by a dermatologic disease may have been improved); 3D face geometry recognition (increased biometric entropy in comparison to 2D systems); 3D palm geometry recognition (another innovative method that increases recognition ability compared to standard 2D systems); face thermoscreen recognition (the screens show high resistance to falsification); and the eye phenomenon (recognition of the retina and the iris). This research activity includes connection through biometric passports, where a 2D face and fingerprints are used, and iris integration comes into play as well.

Invitation to 1st Regional InnoHPC Workshop,
22 February 2018, Linz
12th Open Access Grant Competition results
12th Open Access Grant Competition results
TETRAMAX offers financing of innovative technology experiments, apply until February 28
TETRAMAX offers financial support for innovative ideas in customized low-energy computing. The 1st open call […]
PRACE Summer of HPC 2018 has launched
Early-stage postgraduate and late-stage undergraduate students are invited to apply for the PRACE Summer of […]
Invitation to the course Intel Xeon Phi programming
(2018-02-22 to 2018-02-23)
When: Thursday February 22, 2018, 9.30am – Friday February 23, 2018, 4.30pm Where: campus VŠB-TUO […]
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